The Analog & Mixed Signal ASIC Team at FTDPL has expertise in providing end-to-end technology solutions and IC design services.

Our experienced engineering team provides services in design, layout & verification for Analog, Digital and Mixed-Signal designs with a focus on parts like PHY interface chips and Codecs for wireless and wireline connectivity domains.

The combined skills of the team include an in-depth knowledge in Semiconductors, EDA tools for all stages of the design process and has proven knowledge and experience in various SM/DSM Silicon processes like 0.35, 0.25, 0.18um CMOS and also in BiCMOS processes of leading foundries.

The Team has a good tapeout experience and silicon successes and possesses excellent project management expertise including critical design reviews and documentation processes.

Our digital design team's capabilities include Architectural design, RTL coding, Synthesis, Gate-level simulation, Place & route and post-layout verification.

IC Design Capabilities
 

• Analog Front End (AFE) for Wireless transceivers
• High Speed Base Band transceivers for USB, SATA, PCI-X.
• PLL's for Clock generation and CDR's
• Data Converters for a variety of applications
• A wide range of analog sub-circuits like Opamps, Comparators, BG-references, Voltage
  regulators, Ring-VCOs, Analog Multiplexers and Digital Cells
• Digital design (RTL and ASIC Synthesis, Functional and Timing closure) as a part of some mixed signal SoCs
• Mixed-signal SoC design involving integration of Analog and Digital cores and top-level mixed-mode simulation
• Physical design, verification, Extraction and GDSII tape-out

IC Design services

We offer design services for start-up projects and spin-off projects in Mixed-signal/Analog domains. Our design services include,
 

• Full Chip Design & Layout.

• System Level Designs.

• Analog IP Core Designs.

• Spin off layout Designs

• Digital Synthesis

Tool Flow
 

• Cadence IC Design flow for most of the design work

• H-spice/Spectre used for circuit simulations

• Virtuoso for layout and Assura for LVS/DRC and back-annotation

• NC-verilog, ModelSim for RTL

• Ambit for Synthesis and Magma/Nano-Encounter for P&R

• Other tools can also be used as per customer's choice - the team has prior experience on a variety of EDA/ CAD tool flow

Business Models
 

• The business models are project specific contracts and setting up of exclusive design hubs managed by FTDPL

• Taking up new designs from concept to GDSII or re-targeting existing designs or characterization & tweaking are various possible scopes for projects

• Data Converters

• PLL

For more information on design services please contact info@ftdpl.com