1. Project Manager / Project Leader:
Number of Position - 1
Experience - 7+ Years Experience in ASIC / SoC (Preferably
in mixed signal)
SKILL SETS
ASIC / SoC design / layout, experience in DSM process
technologies down to 130 nm, Cadence custom flow, additional
experience on Spice and Xcalibre.
Work areas will be Digital and analog sub-blocks and MS-SoC
integration.
Qualification - BE/ B Tech/ M Tech
Role focus: Multiple project deliveries; People / Project
Management; Effective & Optimum resource utilization and project
planning.
Project Scope: System-wide responsibility on complex
components or Projects; Provides overall direction for project
teams; Manages all activities related to the project and team.
Supervises: 8-10 Design Engineer’s
Tech Skill / Knowledge: Good understanding of Digital /
Analog IC Technologies, EDA /CAD Flow Multiple foundry processes
/ libraries.
2. Senior Design Engineers:
Number of Position - 2 (Digital – 1 and Analog – 1)
Experience - 3 to 5 Years
Qualification - BE/ B Tech/ M Tech
3. Design Engineers:
Number of Position - 4 (Analog – 2, Digital – 1 and Layout –
1)
Experience - 2+ Years
Qualification - BE/ B Tech/ M Tech
4. Junior Design Engineers:
Number of Position - 3 (Analog – 1, Digital – 1 and Layout –
1)
Experience - around 1 year
Qualification - BE/ B Tech/ M Tech
General Skill Set’s
Process Exposure:
0.18 um CMOS – essential 0.13um and 90 nm –desirable
DSM Process technologies / issues, cadence custom flow,
Tape Out Exposure:
For all ASIC positions full length exposure till tape out,
essential and silicon test experience is desirable.
For Digital Positions:
Experience in RTL coding / synthesis and back end. essential
Synthesis / timing closure – highly desirable For Analog
Position: Experience in ADC / DAC, PLL: Spice and Xcalibre,
mixed signal simulation and general analog sb-blocks and MS-SOC
integration– essential
For Layout Positions:
Experience in full custom IC flow on cadence- essential
Variety process exposure and block/chip level physical
verification – desirable